1. Field of the Invention
The present invention relates to reset signal generators used for resetting systems upon power-up, and in particular, to reset signal generators operating in cooperation with a clock signal generator for providing a valid reset signal to a system prior to the distribution of the clock signal.
2. Description of the Related Art
A problem common to virtually all digital logic systems is that of initializing such systems upon initial power-up. Absent an independent control or reset function, the state or states of the digital logic upon initial power-up will be unknown, thereby causing such circuitry to behave in an unpredictable manner. Such unpredictability is of particular concern when such circuitry is used for processing sensitive data. Such data can become corrupted or otherwise lost due to this unpredictability.
Conventional solutions have included assertion of a system reset as soon as possible after the system clock signal becomes active. However, this results in a time interval during which volatile memory can be corrupted and/or sensitive data can be lost or transmitted in an undesired manner. Accordingly, it would be desirable to have a technique for resetting the system upon initial power-up so as to place the logic in a known state prior to application of the system clock signal.